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CPU System Simulation

Electrical Engineering Student;

Created and integrated SystemC models of digital IP and SoC components to enable early firmware development, system validation, and simulation workflow improvements.

Images are not included due to confidentiality agreements.

Intel Corporation, Vancouver, BC, Canada

September 2025 - April 2026 (in progress)

Skills: C++, SystemC, TBD

  • Constructed SystemC-based software models of digital IP and SoC, enabling firmware validation and system-level testing months ahead of hardware availability.
  • Collaborated with firmware engineers to integrate models into development workflows, helping identify critical bugs and validate feature interactions across multiple hardware blocks.
  • Enhanced simulation infrastructure by increasing automated test coverage, streamlining build and debug workflows, and providing direct support to internal teams using the models.
  • Designed and implemented reusable modeling patterns and verification utilities, reducing development effort for new IP blocks and improving model maintainability across multiple projects.